I'm testing the MT41K256M16 DDR3 on a custom AM4376 board and we suspect one of the bank traces is poorly laid out. I'd like to write to all the bytes in a single bank for my test. This DDR3 has 10 column address bits, 3 bank address bits, and 15 row address bits, and we are using only a single DDR3 chip. I have configured the SDRAM_CONFIG with IBANK_POS=0 and SDRAM_CONFIG_2 EBANK_POS=0.
How can I determine the logical addresses (addresses to put into ARM assembly MOV statements) for a particular bank? Equivalently, how do I break a logical address into DDR3 banks, rows and column?
I think the AM437X TRM, Table 9-153, page 1342 contains what I want, but I find it a bit confusing. I'm interpreting this table to mean for a 16-bit DDR3:
bit 0 doesn't go to the DDR3 because this is a 16-bit DDR3
bits 1-10 used as the 10-bit column address
bits 11-13 used as the 3-bit bank address
bits 14-28 used as the 15-bit row address
So if I have put the statement in U-boot, where the mmu is disabled, *((unsigned char *)(0x800C820)) = 0xAA, I'd be writing to
column 16
bank 1
row 3
Is this correct? If not, what is the correct decoding?
Thanks.