Hello, I'm using the platfrom library to initialize the DDR3 memory after booting from parallel NOR flash on CE1. Booting is stable, but sometimes the DDR memory is not accessible. Currently I'm not sure whether DDR memory is already initialized by RBL or IBL, so it may be a re-initialization problem. To reproduce the problem without booting, I created the following sequence:
1) Call platform_init with init_flags.pll and init_flags.ddr both set to 1. This is necessary to switch to 666.67MHz (My GEL file doesn't do it for some reason).
2) Repeatedly call platform_init with init_flags.ddr set to 1 and then do a DDR memory access test (read-invert-write-readback) Running this shows errors from time to time. It looks like it has to do with read or write levelling. Note: When omitting the initial platform_init call (causes to run DDR3 at 333MHz), the errors occur less frequently. Is the platfrom library (PDK v1.1.2.6) the correct reference for initializing a C6657EVM (PCB 17-00132-02, PCA 18-00132-02)?
Can anyone try to verify this behaviour on his EVM?
The error should appear within one minute when runing at 666.67MHz. Can anyone confirm that the workarounds from SPRZ381 have been implemented in the platform lib?
Below is the source code; attaching the entire project seemed to fail.
#include #include #include #include #include "platform_internal.h" #include "resource_mgr.h" /* OSAL functions for Platform Library */ uint8_t *Osal_platformMalloc (uint32_t num_bytes, uint32_t alignment) { return malloc(num_bytes); } void Osal_platformFree (uint8_t *dataPtr, uint32_t num_bytes) { /* Free up the memory */ if (dataPtr) { free(dataPtr); } } void Osal_platformSpiCsEnter(void) { /* Get the hardware semaphore. * * Acquire Multi core CPPI synchronization lock */ while ((CSL_semAcquireDirect (PLATFORM_SPI_HW_SEM)) == 0); return; } void Osal_platformSpiCsExit (void) { /* Release the hardware semaphore * * Release multi-core lock. */ CSL_semReleaseSemaphore (PLATFORM_SPI_HW_SEM); return; } /****************************************************************************** * Function: main ******************************************************************************/ void main (int argc, char *argv[]) { platform_init_flags init_flags; platform_init_config init_config; Bool bError; /* do a first initialization with PLL and DDR to switch to 666.67MHz */ memset(&init_flags, 0x00, sizeof(platform_init_flags)); memset(&init_config, 0x00, sizeof(platform_init_config)); init_flags.pll = 1; init_flags.ddr = 1; if (platform_init(&init_flags, &init_config) != Platform_EOK) printf("Platform failed to initialize\n"); /* main loop */ for(;;) { /* platform lib initialization */ memset(&init_flags, 0x00, sizeof(platform_init_flags)); memset(&init_config, 0x00, sizeof(platform_init_config)); init_flags.ddr = 1; /* DDR3 only; no PLL */ if (platform_init(&init_flags, &init_config) != Platform_EOK) printf("Platform failed to initialize\n"); /* do a memory test */ { Uint32 *pWork = (Uint32 *)0x80000000; //point to start of DDR3 Uint32 u32Tmp; bError = FALSE; do { *pWork = u32Tmp = ~(*pWork); if (u32Tmp != *pWork) { fpgaControlUserLEDs(FPGA_USER_LED0, FPGA_LED_ON); bError = TRUE; break; } } while (++pWork