Part Number: DAC38J84
Hi,
Figure 56 shows that mem_serdes_refclk_sel = 1 would bypass the DAC PLL and take the SerDes reference clock directly from the DACCLKP/N pins.
Would you kindly confirm that config59[15] (serdes_clk_sel) = 1 is the value to bypass the DAC PLL?
Hopeful thanks --todd