Part Number: DS90UB954-Q1
Hello,
I'm trying to interface the DS90UB954 to a reference design for a MIPI receiver supplied by Lattice in their ECP5 FPGA. Rather than trying to get the imager to send data through the Serdes and into the FPGA all at once (Tried and failed) I'm trying to just get a test pattern from the 954 to go into the Lattice part successfully.
If my PGEN_CSI_DI register is set to 0x1E should I be getting YUV422 8 bit or 10 bit format?
Also I want to make sure I'm not entering LP mode. If I set register bit 0x33[1] Continuous clock to 1 then I shouldn't enter LP mode right?
Finally I notice in the fixed colorbar pattern example (7.5.11.4 in the datasheet) the register 0x20 for forwarding is never enabled. Is this needed for the test pattern?
Thanks,
Vivek