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ADS8353: SPI clock period and sample rate

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Part Number:ADS8353

The datasheet appears to have conflicting information - it states that the ADS8353 is capable of 16 bits at 600ksps, and that it has a throughput time of 16.6us which is consistent.  But in the SPI clock specification it states that the minimum SPI clock period for the ADS8353 is 50ns and it requires a minimum of 49 clock pulses between samples (50ns x 49 = 2.45us or 408ksps).  The stated acquisition time of 730ns which is supposed to correspond approx to 16 clock cycles also agrees with the 50ns clock period.  So is this part capable of 600ksps (SPICLK period of 29.4ns), or only 408ksps (SPICLK period of 50ns)?


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