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AWR1243: Sync between the test pattern generator between two cascaded chips

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Part Number:AWR1243

Hello all,

We have noticed that when setting the test pattern on the LVDS lanes, we directly start getting it in the host, this is, we do not need even to trigger the radar to start getting the pattern. Now, since there is no triggering, we wonder how to implement this, or if it is a way already out, for cascaded awr1243 chips, where the pattern is set at the very same time on both LVDS lanes.

BR,

Gorka Iturbe


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