Part Number:CDCI6214
I only need single ended clocks on two outputs, but I'd like to use the CMOS outputs for two in-phase single ended using one clock output, is this possible?
From page 77, ch3_cmos_pol looks like it does what I would want, but I wanted to be sure that I understood the meaning of the polarity descriptions-
| 6-5 | ch3_cmos_pol | R/W | 0h | programmability of output CMOS buffer polarity. 0h = P+ N+ 1h = P+ N– 2h = P– N+ 3h = P– N– |
Would 1h in this register mean that the negative output is inverted and thus both outputs would be in phase and share the same clock but be driven separately?