[C6416] What instructions are fetched for a branch target?

Hi,

Is the address, generated in the PG stage of the fetch pipeline, forced to align at the 256-bit boundary?

For example, if a B instruction places the address 0x00000208 in the program fetch counter (PFC), then what will be sent in the next PS stage? Is it 0x00000208 (exactly the value of PFC), or 0x00000200 (forced to be at the 32-byte boundary)?

And if it was 0x00000208, let's suppose, then what would be fetched? Was it 0x00000200~0x00000220 (aligned), or 0x00000208~0x00000228 (cross the 32-byte boundary)?

I did not find out an explicit declaration about that in spru732j or some other docuements. Did I miss something?

Thanks and best regards,