I use MSP430F6736 FLL to create 14.7456 MHz from 32768 Hz crystal (ABS06 : 32.768kHz +-10ppm, size 2.0 x 1.2 x 0.6mm = very small !) .
I'll use this clock for serial communication at 921.6kbps. ( 14.7456MHz/16 = 921.6kbps )
FLL has modulation option to spread the clock energy to reduce EMI.
I have questions.
Will the spread spectrum modulation be harmful for serial communication because it'll change the bit timing every 2 bit transmission data ?
Or will it stabilize the serial communication because baudrate will be controlled every 32 clocks = every 2 bit serial data?
SLAU208M page 164 :
5.2.7 Frequency Locked Loop (FLL)
The FLL continuously counts up or down a frequency integrator. The output of the frequency integrator
that drives the DCO can be read in UCSCTL0, UCSCTL1 (bits MOD and DCO). The count is adjusted +1
with the frequency fFLLREFCLK/n (n = 1, 2, 4, 8, 12, or 16) or –1 with the frequency fDCOCLK/[D × (N+1)].
Five of the integrator bits (UCSCTL0 bits 12 to 8) set the DCO frequency tap. Thirty-two taps are
implemented for the DCO, and each is approximately 8% higher than the previous. The modulator mixes
two adjacent DCO frequencies to produce fractional taps.
( So, even if DCO Modulator is off, output frequency is switched between 2 frequency with 8% difference? )
5.2.8 DCO Modulator
The modulator mixes two DCO frequencies, fDCO and fDCO+1 to produce an intermediate effective
frequency between fDCO and fDCO+1 and spread the clock energy, reducing electromagnetic interference
(EMI). The modulator mixes fDCO and fDCO+1 for 32 DCOCLK clock cycles and is configured with the MOD
bits. When MOD = {0}, the modulator is off.
( When the modulator is off, How the FLL will work?, I wonder )
// 32.768kHz X'tal OSC setting
UCSCTL6 &= ~XT1OFF; // XT1 ON
// FLL frequency lock loop setting
UCSCTL1 &= DCORSEL_5;
UCSCTL1 |= DCORSEL_5 | DISMOD; // DCO range = 5 = 6.0MHz - 23.7MHz, FLL modulation OFF
UCSCTL2 &= ~FLLD_1; // FLLD = 0, 32.768kHz/1
UCSCTL2 &= ~0x3ff;
UCSCTL2 |= 449; // FLLN = 449, 450 times 32.768kHz = 14.7456 MHz, FLLD = 0, 32.768kHz/1