TMS320F28069: how to avoid the unnecessary interruption

Part Number:TMS320F28069

Hi Champs,

There seems unnecessary interruption occasionally occurs.
Is there any way to ignore such interruptions?

For example, when the value is changed from 2 to 1 for ETPS[INTPRD] and the counter value is already 1, the interruption occurs just after the ETPS register is written.
I would like to avoid this kind of interruption.

I thought the event for the interruption would be cleared if ETCLR.bit.INT is set to 1.
In this case, it will accept another interruption and the event for the interruption is latched.

Am i making sense?

Best regards,
Hitoshi