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Occasional SDIO read failed (-110): on WL1837mod

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Hello,

We are using the WL1837MOD configured as below.  About 55% of the time, the wifi driver will load up on the first attempt.  30% of the time, it will load on the 2nd attempt, 8% 3rd attempt, 7% failed all three attempts.

Host Platform:
Altera Cyclone V SoC (ARM Cortex A9 processor, FPGA fabric, peripherals).  Interfaced through MMC/SDIO bus.
OS: linux 3.13.0
 
Driver/Firmware:
Loading modules backported from Linux version R8.5-0-gcb51164
Backport generated by backports.git R8.4-0-g0d46f43
cfg80211: Calling CRDA to update world regulatory domain
wlcore: wl18xx HW: 183x or 180x, PG 2.2 (ROM 0x11)
wlcore: loaded
wlcore: driver version: R8.5
wlcore: PHY firmware version: Rev 8.2.0.0.224
wlcore: firmware booted (Rev 8.9.0.0.31)
 
Relevant Device Tree Entries:
intc: intc@fffed000 {
      compatible = "arm,cortex-a9-gic";
      #interrupt-cells = <3>;
      interrupt-controller;
      reg = <0xfffed000 0x1000>,
            <0xfffec100 0x100>;
   };
         gpiow: gpio@0x100010100 {
            status = "okay";
            compatible = "altr,pio-14.0", "altr,pio-1.0";
            reg = <0x00000001 0x00010100 0x00000010>;
            altr,gpio-bank-width = <1>;
            resetvalue = <0>;
            #gpio-cells = <2>;
            gpio-controller;
            interrupt-parent = <&intc>;
            interrupts = <0 46 IRQ_TYPE_EDGE_RISING>;
            interrupt-controller;
            #interrupt-cells = <2>;
            altr,interrupt_type = <IRQ_TYPE_LEVEL_HIGH>;
         };
      mmc: dwmmc0@ff704000 {
         status = "okay";
         compatible = "altr,socfpga-dw-mshc";
         reg = <0xff704000 0x1000>;
         interrupts = <0 139 4>;
         fifo-depth = <0x400>;
         #address-cells = <1>;
         #size-cells = <0>;
         clocks = <&l4_mp_clk>, <&sdmmc_clk>;
         clock-names = "biu", "ciu";
         num-slots = <0x1>;
         supports-highspeed;
         broken-cd;
//       clock-freq-min-max = <400000 25000000>;
         altr,dw-mshc-ciu-div = <0x3>;
         altr,dw-mshc-sdr-timing = <0x0 0x3>;
         wifi@0 {
            compatible = "ti,wlcore";
            reg = <0>;  // Slot No.
            bus-width = <0x00000004>;
            status = "okay";
            board-ref-clock = <0x00000004>;
            interrupt-parent = <&gpiow>;  //HS gpio required
            interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
         };
      };

When it loads successfully, the log is as follows:


Loading modules backported from Linux version R8.5-0-gcb51164
Backport generated by backports.git R8.4-0-g0d46f43
cfg80211: Calling CRDA to update world regulatory domain
wlcore: wl18xx HW: 183x or 180x, PG 2.2 (ROM 0x11)
wlcore: loaded
wlcore: driver version: R8.5
wlcore: compilation time: Tue Nov 17 10:11:03 2015
mmc_host mmc0: Bus speed (slot 0) = 50000000Hz (slot req 400000Hz, actual 396825HZ div = 63)
mmc_host mmc0: Bus speed (slot 0) = 50000000Hz (slot req 50000000Hz, actual 50000000HZ div = 0)
wlcore: PHY firmware version: Rev 8.2.0.0.224
random: nonblocking pool is initialized
wlcore: firmware booted (Rev 8.9.0.0.31)
IPv6: ADDRCONF(NETDEV_UP): wlan0: link is not ready
lo        Link encap:Local Loopback
          inet addr:127.0.0.1  Mask:255.0.0.0
          inet6 addr: ::1/128 Scope:Host
          UP LOOPBACK RUNNING  MTU:65536  Metric:1
          RX packets:0 errors:0 dropped:0 overruns:0 frame:0
          TX packets:0 errors:0 dropped:0 overruns:0 carrier:0
          collisions:0 txqueuelen:0
          RX bytes:0 (0.0 B)  TX bytes:0 (0.0 B)

wlan0     Link encap:Ethernet  HWaddr 54:4A:16:3A:39:5B
          inet addr:192.168.43.19  Bcast:192.168.43.255  Mask:255.255.255.0
          UP BROADCAST MULTICAST  MTU:1500  Metric:1
          RX packets:0 errors:0 dropped:0 overruns:0 frame:0
          TX packets:0 errors:0 dropped:0 overruns:0 carrier:0
          collisions:0 txqueuelen:1000
          RX bytes:0 (0.0 B)  TX bytes:0 (0.0 B)


When it fails, the log is as follows:

Loading modules backported from Linux version R8.5-0-gcb51164
Backport generated by backports.git R8.4-0-g0d46f43
cfg80211: Calling CRDA to update world regulatory domain
wlcore: wl18xx HW: 183x or 180x, PG 2.2 (ROM 0x11)
wlcore: loaded
wlcore: driver version: R8.5
wlcore: compilation time: Tue Nov 17 10:11:03 2015
mmc_host mmc0: Bus speed (slot 0) = 50000000Hz (slot req 400000Hz, actual 396825HZ div = 63)
mmc_host mmc0: Bus speed (slot 0) = 50000000Hz (slot req 50000000Hz, actual 50000000HZ div = 0)
dwmmc_socfpga ff704000.dwmmc0: data error, status 0x00000208
------------[ cut here ]------------
WARNING: CPU: 0 PID: 158 at /home/howard/rtc/workspace/wl18xx_wl8_wlan/build-utilites/src/compat_wireless/drivers/net/wireless/ti/wlcore/sdio.c:108 wl12xx_sdio_raw_read+0xbc/0x140 [wlcore_sdio]()
Modules linked in: wl18xx(O) wlcore(O) mac80211(O) cfg80211(O) wlcore_sdio(O) compat(O) gpio_altera ngmp_peekpoke(O)
CPU: 0 PID: 158 Comm: ifconfig Tainted: G           O 3.13.0 #25
[<400162a8>] (unwind_backtrace+0x0/0x104) from [<400129d0>] (show_stack+0x20/0x24)
[<400129d0>] (show_stack+0x20/0x24) from [<404f2500>] (dump_stack+0x78/0x94)
[<404f2500>] (dump_stack+0x78/0x94) from [<40022be4>] (warn_slowpath_common+0x78/0x9c)
[<40022be4>] (warn_slowpath_common+0x78/0x9c) from [<40022c34>] (warn_slowpath_null+0x2c/0x34)
[<40022c34>] (warn_slowpath_null+0x2c/0x34) from [<3f00e404>] (wl12xx_sdio_raw_read+0xbc/0x140 [wlcore_sdio])
[<3f00e404>] (wl12xx_sdio_raw_read+0xbc/0x140 [wlcore_sdio]) from [<3f16fdb4>] (wl18xx_boot+0x5fc/0xbf4 [wl18xx])
[<3f16fdb4>] (wl18xx_boot+0x5fc/0xbf4 [wl18xx]) from [<3f13bfa0>] (wl1271_op_add_interface+0x660/0x874 [wlcore])
[<3f13bfa0>] (wl1271_op_add_interface+0x660/0x874 [wlcore]) from [<3f0add3c>] (ieee80211_do_open+0x4f8/0xd14 [mac80211])
[<3f0add3c>] (ieee80211_do_open+0x4f8/0xd14 [mac80211]) from [<3f0ae5d8>] (ieee80211_open+0x80/0x84 [mac80211])
[<3f0ae5d8>] (ieee80211_open+0x80/0x84 [mac80211]) from [<403ffea4>] (__dev_open+0xac/0x110)
[<403ffea4>] (__dev_open+0xac/0x110) from [<40400150>] (__dev_change_flags+0x9c/0x168)
[<40400150>] (__dev_change_flags+0x9c/0x168) from [<40400264>] (dev_change_flags+0x28/0x58)
[<40400264>] (dev_change_flags+0x28/0x58) from [<40457e34>] (devinet_ioctl+0x630/0x6e0)
[<40457e34>] (devinet_ioctl+0x630/0x6e0) from [<40459338>] (inet_ioctl+0x1c0/0x1d0)
[<40459338>] (inet_ioctl+0x1c0/0x1d0) from [<403e5ff0>] (sock_ioctl+0x74/0x2a0)
[<403e5ff0>] (sock_ioctl+0x74/0x2a0) from [<4010bbb0>] (do_vfs_ioctl+0x88/0x5ac)
[<4010bbb0>] (do_vfs_ioctl+0x88/0x5ac) from [<4010c11c>] (SyS_ioctl+0x48/0x70)
[<4010c11c>] (SyS_ioctl+0x48/0x70) from [<4000eb40>] (ret_fast_syscall+0x0/0x30)
---[ end trace 77ea771eadd247f4 ]---
wl1271_sdio mmc0:0001:2: sdio read failed (-110)
mmc_host mmc0: Bus speed (slot 0) = 50000000Hz (slot req 400000Hz, actual 396825HZ div = 63)
mmc_host mmc0: Bus speed (slot 0) = 50000000Hz (slot req 50000000Hz, actual 50000000HZ div = 0)
dwmmc_socfpga ff704000.dwmmc0: data error, status 0x00000208
------------[ cut here ]------------
WARNING: CPU: 0 PID: 158 at /home/howard/rtc/workspace/wl18xx_wl8_wlan/build-utilites/src/compat_wireless/drivers/net/wireless/ti/wlcore/sdio.c:108 wl12xx_sdio_raw_read+0xbc/0x140 [wlcore_sdio]()
Modules linked in: wl18xx(O) wlcore(O) mac80211(O) cfg80211(O) wlcore_sdio(O) compat(O) gpio_altera ngmp_peekpoke(O)
CPU: 0 PID: 158 Comm: ifconfig Tainted: G        W  O 3.13.0 #25
[<400162a8>] (unwind_backtrace+0x0/0x104) from [<400129d0>] (show_stack+0x20/0x24)
[<400129d0>] (show_stack+0x20/0x24) from [<404f2500>] (dump_stack+0x78/0x94)
[<404f2500>] (dump_stack+0x78/0x94) from [<40022be4>] (warn_slowpath_common+0x78/0x9c)
[<40022be4>] (warn_slowpath_common+0x78/0x9c) from [<40022c34>] (warn_slowpath_null+0x2c/0x34)
[<40022c34>] (warn_slowpath_null+0x2c/0x34) from [<3f00e404>] (wl12xx_sdio_raw_read+0xbc/0x140 [wlcore_sdio])
[<3f00e404>] (wl12xx_sdio_raw_read+0xbc/0x140 [wlcore_sdio]) from [<3f16fdb4>] (wl18xx_boot+0x5fc/0xbf4 [wl18xx])
[<3f16fdb4>] (wl18xx_boot+0x5fc/0xbf4 [wl18xx]) from [<3f13bfa0>] (wl1271_op_add_interface+0x660/0x874 [wlcore])
[<3f13bfa0>] (wl1271_op_add_interface+0x660/0x874 [wlcore]) from [<3f0add3c>] (ieee80211_do_open+0x4f8/0xd14 [mac80211])
[<3f0add3c>] (ieee80211_do_open+0x4f8/0xd14 [mac80211]) from [<3f0ae5d8>] (ieee80211_open+0x80/0x84 [mac80211])
[<3f0ae5d8>] (ieee80211_open+0x80/0x84 [mac80211]) from [<403ffea4>] (__dev_open+0xac/0x110)
[<403ffea4>] (__dev_open+0xac/0x110) from [<40400150>] (__dev_change_flags+0x9c/0x168)
[<40400150>] (__dev_change_flags+0x9c/0x168) from [<40400264>] (dev_change_flags+0x28/0x58)
[<40400264>] (dev_change_flags+0x28/0x58) from [<40457e34>] (devinet_ioctl+0x630/0x6e0)
[<40457e34>] (devinet_ioctl+0x630/0x6e0) from [<40459338>] (inet_ioctl+0x1c0/0x1d0)
[<40459338>] (inet_ioctl+0x1c0/0x1d0) from [<403e5ff0>] (sock_ioctl+0x74/0x2a0)
[<403e5ff0>] (sock_ioctl+0x74/0x2a0) from [<4010bbb0>] (do_vfs_ioctl+0x88/0x5ac)
[<4010bbb0>] (do_vfs_ioctl+0x88/0x5ac) from [<4010c11c>] (SyS_ioctl+0x48/0x70)
[<4010c11c>] (SyS_ioctl+0x48/0x70) from [<4000eb40>] (ret_fast_syscall+0x0/0x30)
---[ end trace 77ea771eadd247f5 ]---
wl1271_sdio mmc0:0001:2: sdio read failed (-110)
mmc_host mmc0: Bus speed (slot 0) = 50000000Hz (slot req 400000Hz, actual 396825HZ div = 63)
mmc_host mmc0: Bus speed (slot 0) = 50000000Hz (slot req 50000000Hz, actual 50000000HZ div = 0)
wlcore: PHY firmware version: Rev 8.2.0.0.224
wlcore: firmware booted (Rev 8.9.0.0.31)
IPv6: ADDRCONF(NETDEV_UP): wlan0: link is not ready
lo        Link encap:Local Loopback
          inet addr:127.0.0.1  Mask:255.0.0.0
          inet6 addr: ::1/128 Scope:Host
          UP LOOPBACK RUNNING  MTU:65536  Metric:1
          RX packets:0 errors:0 dropped:0 overruns:0 frame:0
          TX packets:0 errors:0 dropped:0 overruns:0 carrier:0
          collisions:0 txqueuelen:0
          RX bytes:0 (0.0 B)  TX bytes:0 (0.0 B)

wlan0     Link encap:Ethernet  HWaddr 54:4A:16:3A:39:5B
          inet addr:192.168.43.19  Bcast:192.168.43.255  Mask:255.255.255.0
          UP BROADCAST MULTICAST  MTU:1500  Metric:1
          RX packets:0 errors:0 dropped:0 overruns:0 frame:0
          TX packets:0 errors:0 dropped:0 overruns:0 carrier:0
          collisions:0 txqueuelen:1000
          RX bytes:0 (0.0 B)  TX bytes:0 (0.0 B)

I've looked at the signals with an oscilloscope - they appear to be clean.  Trace lengths are all the same.  I have added series damping resistors with no change.   Suggestions on what else to look at?
Thanks
David
 

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