Part Number:DP83867IS
I noticed a note on page 38 in "SNLS504B - October 2015 - Revised March 2017". The Note states:
Strap modes 1 and 2 are not applicable for RX_CTRL. The RX_CTRL strap must be
configured for strap mode 3 or strap mode 4. If the RX_CTRL pin cannot be strapped to
mode 3 or mode 4, bit[7] of Configuration Register 4 (address 0x0031) must be cleared to
0.
I looked at the definition of Configuration Register 4, bit 7. This bit is reserved and is normally cleared to zero. Is it possible to get a better description of this bit that I need to clear.
The custom HW I am working with is setting the RX_CTRL pin to mode 1 which is labeled n/a in the datasheet.
Thank you