DP83620: Usage of ETH Phy DP83620 in FX mode

Part Number:DP83620

Hi,

We plan to use the ETH Phy DP83620 in FX mode. Instead of using a FOT, we plan on using LVPECL/CML to M-LVDS converters for a multi drop Ethernet backplane design”. Implementation is given in below flow chart.

1. Does TI have any ref implementation/ design/ any similar attempt with other customers in implementing an Ethernet Multidrop via LVDS using the above idea.

1. In Section 7.1.2 of Ethernet PHY datasheet, dp83620 Datasheet, that discusses the need for encoding to avoid FCC issues when using Copper Mode. Also referring Section 7.3.1 in same document we see this Scrambler and MLT3 encoding is bypassed in FX mode. Hence in FX mode this may be OK, but we are now still continuing to us this in LVDS mode. Would like to understand if there is any documented evidence of EMI/EMC impact if we implement this way.