Dear support,
I hope I can receive help from you one more time. Our hardware is based on the c6670 chip and I have one problem and one question
Problem:
I am running the EDMA example that is causing me some issues. It seems that only one side of the transfer is working.
I can see the DDR on the DSP being filled and the content inverted. Therfore the outbound read is working properly (a so is the edma transfer).
Since the memory content has been inverted, I can assume safely that the DSP has received the legacy interrupt and has run his handler.
Now is my problem, the host is not receiving the interrupt from the DSP and I do not know why. Could you give me a pointer to start my investigation.
the dsp code does the following: *((uint32_t *)PCIE_EP_IRQ_SET) = 0x1;
and the document says: Write 1 to generate assert interrupt message. If MSI is disabled, legacy interrupt assert message will be generated. On
read, a 1 indicates currently asserted interrupt.
Does than mean the the MSI interrupt should be enabled to receive an interrupt on the host? Is this interrupt physically on the PCI bus?
Question:
I also have one question regarding this code:
HAL_writeDMA (wData, DDR_START, DMA_TRANSFER_SIZE, 1); /* Move from GPP to DSP */
printk ("Generating interrupt to DSP ...\n");
iowrite32(1, ptrReg + LEGACY_A_IRQ_STATUS_RAW/4);
It is written in the example that "From PCIE specification, legacy interrupts cannot be generated from RC and be passed downstream. The example below is just making use of the facility that RC can access EP side register to generate a generic interrupt on local (EP) side using one of the event inputs of Interrupt Controller (INTC). There is no real interrupt signal sent over the PCIe link "
Is there a reason why this example cannot use the MSI interrupts, or the edma transfer to interrupt the DSP?
Thanks in adance for your help
Aymeric