Part Number:MSP430F5658
During product ESD testing a condition was found where the processor would not respond to a reset. It would however respond to connecting the IAR IED and FET430UIF interface, selecting "attach to running project" selecting break (it showed address 0) and reset. Thus the program was still there but asserting the reset (from an external watchdog chip) had no effect, the JTAG could restart the program. Is there something beyond asserting the reset that needs to be done by the external watchdog?