The following wiki article drew my attention:
http://processors.wiki.ti.com/index.php/How_to_program_VPBE_YCC8_digital_out
This article, categorized in DM365, said "YCC8 mode require nonstandard timing".
Does this article apply to DM368?
VPBE user manual (literature number sprufg9c, page 45/334) said "To use BT656 mode, the VENC must operate in the standard mode (VMOD.VMD=0)." under a subtitle of YCC8 signal interface description. It indicates that if a user requires YCC8 with optional BT656, DM368 must run under the standard mode. This is different from what the article said.
Furthermore, I felt confused by the following sentence: "Note that this mode operates correctly only when the pixel clock frequency is half of the VENC clock." (literature number sprufg9c, page 45/334) Take 480i via YCC8 as an example: the pixel clock is 27MHz, double pixel clock frequency of YCC16. Does this mean VENC should run at 54MHz?
Please kindly correct my understanding of DM368 VPBE user's guide.