Part Number:TMS320C6678
Tool/software: TI-RTOS
I'm working on a project with the C6678 processor. We have a "master" program running on core 0 and a "slave" program running on cores 1-5. We think we are smarter than the cache controller so we wanting to turn off caching and have the linker put routines that we need to run really fast in L1P SRAM. According to the .map file, we've been successful. For now, all I'm putting there is the cos() function from rts6600_elf.lib in the slave program. But when our program starts running, every BIOS call that we make fails (Task_create, malloc, Hwi_create, etc). If I remove the linker command to locate cos() in L1P, everything works fine. Here's what I'm doing
In C6678.cmd:
:
MEMORY
{
L1PSRAM (RWX) : org = 0x0E00000, len = 0x8000
}
SECTIONS
{
...
.dude : { rts6600_elf.lib<cos.obj>(.text) } > L1PSRAM
...
In app.cfg:
Program.sectMap[".dude"] = "L1PSRAM";
I also modified the ti.plaforms.evm667 package (that our project points to) to look like this:
Here's what my .map file looks like after I build:
...
MEMORY CONFIGURATION
name origin length used unused attr fill
---------------------- -------- --------- -------- -------- ---- --------
L2SRAM 00800000 00080000 0005fc78 00020388 RW X
L1PSRAM 00e00000 00008000 00000320 00007ce0 RW X
MSMCSRAM 0c000000 00400000 00000000 00400000 RW X
...
SEGMENT ALLOCATION MAP
run origin load origin length init length attrs members
---------- ----------- ---------- ----------- ----- -------
00800000 00800000 0002244c 0002244c r-x
00800000 00800000 00022440 00022440 r-x .text
00822440 00822440 0000000c 0000000c r-- .init_array
00822480 00822480 00034cfb 00000000 rw-
00822480 00822480 0001b30c 00000000 rw- .far
0083d790 0083d790 000199eb 00000000 rw- .fardata
00857180 00857180 000047e4 000047e4 r--
00857180 00857180 000047e4 000047e4 r-- .const
0085b968 0085b968 00002000 00000000 rw-
0085b968 0085b968 00002000 00000000 rw- .stack
0085d968 0085d968 000003e4 000003e4 r--
0085d968 0085d968 000003e4 000003e4 r-- .switch
0085dd50 0085dd50 0000013c 00000000 rw-
0085dd50 0085dd50 00000120 00000000 rw- .cio
0085de70 0085de70 0000001c 00000000 rw- .neardata
0085de8c 0085de8c 0000002c 00000000 r--
0085de8c 0085de8c 0000002c 00000000 r-- .rodata
0085deb8 0085deb8 0000003d 00000000 rw-
0085deb8 0085deb8 0000003d 00000000 rw- .bss
0085e000 0085e000 00001dc8 00001dc8 r-x
0085e000 0085e000 00000200 00000200 r-x .vecs
0085e200 0085e200 00001bc8 00001bc8 r-- .cinit
00e00000 00e00000 00000320 00000320 r-x
00e00000 00e00000 00000320 00000320 r-x .dude
SECTION ALLOCATION MAP
output attributes/
section page origin length input sections
-------- ---- ---------- ---------- ----------------
.text 0 00800000 00022440
...
.dude 0 00e00000 00000320
00e00000 000002e0 rts6600_elf.lib : cos.obj (.text:cos)
00e002e0 00000010 : modf.obj ($Tramp$S$$modf)
00e002f0 00000010 : round.obj ($Tramp$S$$__c6xabi_nround)
00e00300 00000010 : trunc.obj ($Tramp$S$$__c6xabi_trunc)
00e00310 00000010 --HOLE-- [fill = 00000000]
...
So it looks correct to me. Can someone tell me what I'm doing wrong? Thanks!