TMS320C6678: configuring secondary events per core

Part Number:TMS320C6678

Hi all,

I was wandering if it's possible to configure secondary events to be triggered at each core independently.

for example let say i'm enabling primary event 95 which described as follows: CIC0_OUT(7 + 8*n) Or CIC1_OUT(7 + 8*(n-4)).

does that means that this event can be triggered from all the above CIC outputs independently? meaning for core0 by CIC0_OUT7, for core1 by CIC0_OUT15 etc.

if so, i'm using the following code to enable it, but only core0 gets the interrupt (that code runs on all cores). 

if (DNUM > 3)
	CpIntcId = 1;

CpIntc_mapSysIntToHostInt(CpIntcId, 110, (!CpIntcId)*DNUM*8 + CpIntcId*(DNUM-4)*8);

CpIntc_enableSysInt(CpIntcId, 110);

CpIntc_enableHostInt(CpIntcId, (!CpIntcId)*DNUM*8 + CpIntcId*(DNUM-4)*8);

(additionally, primary event 95 is configured to be handled by the event combiner, through config file)

thanks in advance,

shay.