TMS570LS0432: Enable PBIST clocks and ROM clock for PBIST self-test

Part Number:TMS570LS0432

Hello all,

Is there some special reason why in the pbistSelfCheck() function the PBIST clocks and ROM clock are re-enabled by writing 0x3 on the PACT register (see the code below)? Actually 0x01 should be sufficient.

/* Enable PBIST clocks and ROM clock */
    pbistREG->PACT = 0x3U;

Also the PBIST Memory Self-Test Flow Diagram at the stage says PACT = 0x3U.