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BQ40Z80: Learning cycle - Behavior CHG and DSG FETs

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Part Number:BQ40Z80

I'm working on a custom made board with PB40Z80 and preparing to run the learning cycle. BqStudio doesn't support this feature (yet), so I build a relay jig and wirting software to automate this process entirely. Therefore I strictly follow SLUA848. As a prerequisite, all the requirements from chapter 3 are configured and a GPC cycle was successfully run with ChemID programmed.

However, while writing software I observed that the CHG and DSG FETs will not stay ON, hence there is no voltage and current on the PACK pins. SLUA848 describes the following process in chapter 4.2.1 first bullet point:

Before beginning the discharge, turn on the charge and discharge FETs by sending command 0x22, or by sending the CHG_FET_TOGGLE and DSG_FET_TOGGLE commands until both the CHG and DSG bits are  shown as red in the Bit Registers. Next send IT (Gauge) enable command (0x21), or use the GAUGE_EN command to set the GAUGE_EN in manufacturing status register and QEN flags in IT Status register. Then send the reset command (0x41), or select RESET, to set the RDIS flag and disable resistance updates during this initial discharge cycle.


My observation is that, when CHG and DSG FETs are commanded ON, they will turn OFF as soon as the RESET command is send. Even when the FETs are commanded ON after the RESET, they will turn OFF with delay. My workaround is periodically commanding both FETs open while processing the cycle status. All other requirements are met so far.

So my questions:

Please can someone from product support can check and verify, that the process description in SLUA848, chapter 4.2.1 is correct and complete?

Can I run the learning cycle with charger and load VCC connected to BATTERY+ (VC6), while GND is connected to PACK- (current through shunt)? As descripted in SLUUBT4A, chapter 3.3.3.

What steps are required to set a BQ40Z80 into unlearned state? Can I repeat a learning cycle several times without messing up the gauging algorithm?


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