Part Number:XEVMK2LX
I am trying to calculate the maximum ADC rate that can be supported by the 66AK2L06 EVM on each FMC connector. Are the following calculations correct?
- Each FMC connector has 2Rx JESD204B lanes each at 7.37Gbps. This is an aggregate line rate of 14.74Gbps. With 8b10b coding this implies true data rate of 14.74*8/10=11.8Gbps
- So maximum supported ADC sample rate for 10-16bit ADCs is 11.8/16 = 737MSPS. Or should I divide by the ADC resolution in this last calculation, how is the data packed?