AM5716: Modifying DSP L1 cache configuration from ARM core

Part Number:AM5716

Hello,

I would just like to confirm whether or not the following statement is true:

"There is no way to modify the L1 cache configuration of the DSP core from code running on the ARM core."

I'm asking because I have a bootloader, running on the ARM core, that is attempting to load initialized data sections directly to DSP L1D. This isn't working because DSP L1 memory is configured as cache by default.

Thanks as always,
Dave