Hello, I have a custom developed pcb board containing dual C6678 processors with their srio lane 0's cross-connected (lanes 1..3 are connected to other on-board devices).
To verify the physical connections on the pcb, and to learn how to interface/use the SRIO I have tried to use the srioIpcChipToChipExample (from pdk_C6678_1_0_0_17), loading/running the producer on dsp A from one host /debugger and the consumer on dsp B from another host/debugger.
So far, no success... Both sides passes the "Port 0 ok" check (I don't check the other ports, as they are not connected). Eventually, the producer side ends up stuck after "Global Core 0/1: attempting to open remote board Queue CORE2/CORE3" and the consumer side ends up stuck (in MessageQ_get()) after "Global Core 1/2: Receiving packets from an off-chip core". Eventually, some time after this, I often get an assertion failure on the producer side "ti.sdo.ipc.MessageQ: line 251: assertion failure: A_invalidMsg: Invalid Message".
Some registers indicate a low level problem of some kind:
Producer side Consumer side
RIO_SP_CTL = 0x00600001 (same as producer)
RIO_SP_LM_REQ = 0x00000000 (same as producer)
RIO_SP_LM_RESP = 0x80000005 0x00000005
RIO_SP_ERR_STAT = 0x00020202 (same as producer)
RIO_SP_ACKID_STAT = 0x02000202 (same as producer)
(or 0x08000808) (same as producer)
(or 0x0C000C0C) (same as producer)
RIO_PLM_SP_PATH_CTL = 0x00000400 (same as producer)
RIO_PRESCALAR_SRV_CLK = 0x0000001F (same as producer)
RIO_ERR_DET = 0x00100005 0x00000000
(Sorry about the indenting)
The "Delineation error" and "Link time-out" errors make me think it's a low-level problem, probably some kind of configuration error on my part?
I'm not yet familiar with IPC, "base routing", and some other concepts. So I may need help to understand what settings I need to change for our case, using only one lane instead of four. The only code so far that I found that I had to change for our board was the prescalar setting, which in the example was set to 0x21, which must be wrong for the EVM as well as our board, both using a 312.5 MHz clock.
BR, Marty