DM8148 McASP

Hi,

We are using 2 McASP interfaces between FPGA and DM8148 processor. I would need ACLKX, AFSX, AXR(bit clk, word clk, data) for transmission and ACLKR, AFSR,AXR, AHCLKR (bit clk, word clk, data and master clk) for reception. But in DM8148  device AHCLKR pins are not provided in any of McASP terminals. But in timing requirements of McASP (Table 8-78) this signal is mentioned. 

Regards

Madhura