We built a custom board based on dm814x with two 1gigabit ddr3 rams (with 16bits) installed in emif0.
emif1 is not used.
After run ti814x_ddr3.gel, load & run DDR3_SlaveRatio_ByteWiseSearch_TI814x.out
rd dqs, rd gate dqs, wr dqs converging failed. i tested only emif0.
I tried various seeds but failed. But, EVM board from mistral passes this test completely. all three
values are converged in one shot.
Please let me know the state of my custom board.
1. ddr3 physically inaccessible or not ? data corruption ? just a converging problem ?
power problem or schematic problem possible in this state ?
2. is there any possibility that corrupted code is executing at the core ? when i tested jtag (xds100v2)
connection, it reported data transfer failed 83%. then without crc/checksum that check the binary
integrity, core can execute corrupted code. But binary executing state looks fine, displaying console
message properly..., so i think, there must be transfer correction algorithms is kicking in.
thanks in advance.
BR.