I was going through the AM335X Schematic Checlist Recommendations :
http://processors.wiki.ti.com/index.php/AM335x_Schematic_Checklist#DDR2
It mentions that DDR_VREF be derived using a resistor divider with decoupling to both DDR supply and ground, and to follow DDR2 routing guidelines of the datasheet.
But i find that this is not implemented in the same way as mentioned in data sheet in beaglebone or EVM . So I just have a slight confusion as to what design to follow here, as I was suggested that the recommendations in the datasheet might be ideal and that implemented in beaglebone or EVM are according to practical working conditions.
For the meanwhile I have kept the beaglebone/EVM DDR_VREF design because its working one.