Part Number:ADC128S102QML-SP
Hi TI,
I have two situations I need some assistance with, one is short term one is long term:
Short term (i.e. I'm going to fix this problem, but I want to know if my near-term measurements are going to have significant errors):
My system has two of the 8 inputs on this ADC connected. Each line input a series resistance of ~475 ohms, as well as a 100nF shunt capacitance. The shunt capacitance is very close to the associated input pin. Whenever I'm sampling one of the inputs, the other input is set to a voltage higher than the rail, such that (assuming the high-side ESD diode is at a 0.3V drop) there is about 4mA of current going into the input pin. What kind of error to the measurement will this introduce to the channel that is being sampled? Will the ESD diode current raise the "measured" VA, effectively degrading the reference? Do you have any insight as to how severe this effect will be?
Long term (I want to run my system for a long time (months to years) under these conditions):
My system will again have two of the 8 inputs on this ADC connected. One of these connections will experience about -6mA of input current for less than 100ms every second (alternatively it could experience +4mA of input current for less than 100ms every second, in case the polarity is important). The rest of the time the ESD diodes should not have any current flow. The datasheet claims an absolute maximum ESD diode current (calls it input current) of 10mA per pin with a 2 pin maximum. I'm wondering if this condition, less than 10mA but not significantly less, with a duty cycle of 10% would tend to degrade reliability and performance, or if it's likely to cause negligible degradation of reliability or performance.
Thanks,
Max