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Cycle-By-Cycle Current Limit of Three-Phase PWM Motor Driver (DRV8312/32)

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Dear TI Application Engineers,

I have two questions about motor driver IC DRV8312/32 regarding the cycle-by-cycle current limit with high side OC (please refer to Fig. 6 in the datasheet).

1. Why does the device turn on the low side FET when high side OC is detected, as well as turn off the active high side FET carrying the current? what is the advantage of doing that instead of keeping the low side FET off?

2. If the high side FET is forced off and the low side FET forced on immediately and simultaneously at high side OC, there should be a hard short via the DC bus and this FET leg (see the falling and rising edges in the highlighted solid line in Fig. 6).

Best Regards,

Dan


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