Part Number:TAS6424L-Q1
Hi,
Ok, I have good timing inputs using PCM1803 and am beyond that problem. No "timing error" with this source.
However, the amp. chip gets warm and toggles the over heating error bits and shuts down after a minute.
I have the configuration from the data sheet: "Figure: 82". I am driving with the L/R channels in the I2S waveform
from the PCM1803 codec. I have SDIN1 and SDIN2 tied together as I only have a MONO source. I have the
inputs to the PCM1803 L/R also tied together as I simply need to make a 1KHz warning tone with the product.
I'm making power but see no sine wave at the outputs. The amp. gets hot but not load resistors. All I can imagine
is the duty cycle is 50% so no power is delivered to the loads.
I found the bit in "Table 13" which has something to do with the PBTL inputs and "inverting them". No doc's on
this in the data sheet except for a minor mention. The TAS6424Q1EVM and Puepulse software does have a
bit mroe in that it states the single bit seems to select for inputs 1&3 or 2&4. I have it 0, so 1&3 are inputs.
However with the two SDIN's tied together 3 is really the same as 1 since I2S is ONLY a L/R stream.
What is not clear is just what the heck is needed to drive the circuit in Fig. 82? Not spelled out at all.
I am hoping you aren't going to tell me I need to have two I2S feeds to get a 1&3 input channel rather
than simply feed it with one i2S in the typical L/R configuration. Would be a huge waste to put enough logic
on my board to make two feeds just to separate out channel 2 and make it channel 3 on SDIN2.
How the heck could this be done with as few parts as possible to get: LEFT=channel 1=SDIN1 and
RIGHT=channel2=SDIN2. Is this why I'm not getting any sound? Getting hot?
I simply can't believe you would design the IC this way. How are car stereo designers supposed to
come up with a channel 1 and 3 when all they need are L/R as 1/2? In PBTL mode the IC is just
a stereo amp. with L/R so why impose such a goofy constraint on the application design?
I expected that driving one I2S as L/R (64bit) would work ok on PBTL-1 and PBTL-2 would make
the same sound being it is getting the same (LEFT part of I2S frame) as channel 1, right?
Maybe I'm reading this wrong, not clear how the IC is intended to work when driven correctly?
Please advise on how I can get past this next hurdle and move on.
Regards,
Marc Yaxley
MySoftworks Co.