Part Number:AM3358
Tool/software: Code Composer Studio
We have been debugging a custom prototype board which uses Octavo's OSD3358-SM, the same chip inside Beaglebone's PocketBeagle and contains the AM335x embedded. While trying to access the chip using the JTAG interface with Code Composer Studio, I set up the target configuration to support AM3358 and then attempted to test the connection. The integrity tests fail every single time, the results of the test are shown below:
[Start: Texas Instruments XDS100v2 USB Debug Probe_0] Execute the command: %ccs_base%/common/uscif/dbgjtag -f %boarddatafile% -rv -o -F inform,logfile=yes -S pathlength -S integrity [Result] -----[Print the board config pathname(s)]------------------------------------ /home/avionica/.ti/ti/0/1/BrdDat/testBoard.dat -----[Print the reset-command software log-file]----------------------------- This utility has selected a 100- or 510-class product. This utility will load the adapter 'libjioserdesusb.so'. The library build date was 'Feb 8 2018'. The library build time was '18:25:14'. The library package version is '7.0.188.0'. The library component version is '35.35.0.0'. The controller does not use a programmable FPGA. The controller has a version number of '4' (0x00000004). The controller has an insertion length of '0' (0x00000000). This utility will attempt to reset the controller. This utility has successfully reset the controller. -----[Print the reset-command hardware log-file]----------------------------- The scan-path will be reset by toggling the JTAG TRST signal. The controller is the FTDI FT2232 with USB interface. The link from controller to target is direct (without cable). The software is configured for FTDI FT2232 features. The controller cannot monitor the value on the EMU[0] pin. The controller cannot monitor the value on the EMU[1] pin. The controller cannot control the timing on output pins. The controller cannot control the timing on input pins. The scan-path link-delay has been set to exactly '0' (0x0000). -----[The log-file for the JTAG TCLK output generated from the PLL]---------- There is no hardware for programming the JTAG TCLK frequency. -----[Measure the source and frequency of the final JTAG TCLKR input]-------- There is no hardware for measuring the JTAG TCLK frequency. -----[Perform the standard path-length test on the JTAG IR and DR]----------- This path-length test uses blocks of 64 32-bit words. The test for the JTAG IR instruction path-length succeeded. The JTAG IR instruction path-length is 6 bits. The test for the JTAG DR bypass path-length succeeded. The JTAG DR bypass path-length is 1 bits. -----[Perform the Integrity scan-test on the JTAG IR]------------------------ This test will use blocks of 64 32-bit words. This test will be applied just once. Do a test using 0xFFFFFFFF. Scan tests: 1, skipped: 0, failed: 0 Do a test using 0x00000000. Scan tests: 2, skipped: 0, failed: 0 Do a test using 0xFE03E0E2. Test 3 Word 0: scanned out 0xFE03E0E2 and scanned in 0xFE01E062. Test 3 Word 1: scanned out 0xFE03E0E2 and scanned in 0xFE01E062. Test 3 Word 2: scanned out 0xFE03E0E2 and scanned in 0xFE01E0FC. Test 3 Word 3: scanned out 0xFE03E0E2 and scanned in 0xFE01E0FC. Test 3 Word 4: scanned out 0xFE03E0E2 and scanned in 0xFE01E0FC. Test 3 Word 5: scanned out 0xFE03E0E2 and scanned in 0xFE01E0FC. Test 3 Word 6: scanned out 0xFE03E0E2 and scanned in 0xFE01E0FC. Test 3 Word 7: scanned out 0xFE03E0E2 and scanned in 0xFE01E0FC. The details of the first 8 errors have been provided. The utility will now report only the count of failed tests. Scan tests: 3, skipped: 0, failed: 1 Do a test using 0x01FC1F1D. Scan tests: 4, skipped: 0, failed: 2 Do a test using 0x5533CCAA. Scan tests: 5, skipped: 0, failed: 3 Do a test using 0xAACC3355. Scan tests: 6, skipped: 0, failed: 4 Some of the values were corrupted - 65.1 percent. The JTAG IR Integrity scan-test has failed. -----[Perform the Integrity scan-test on the JTAG DR]------------------------ This test will use blocks of 64 32-bit words. This test will be applied just once. Do a test using 0xFFFFFFFF. Scan tests: 1, skipped: 0, failed: 0 Do a test using 0x00000000. Scan tests: 2, skipped: 0, failed: 0 Do a test using 0xFE03E0E2. Test 3 Word 32: scanned out 0xFE03E0E2 and scanned in 0xFE03E0E0. Test 3 Word 37: scanned out 0xFE03E0E2 and scanned in 0xFE03E0E0. Scan tests: 3, skipped: 0, failed: 1 Do a test using 0x01FC1F1D. Test 4 Word 16: scanned out 0x01FC1F1D and scanned in 0x01FC1F1C. Test 4 Word 24: scanned out 0x01FC1F1D and scanned in 0x01FC1F1C. Test 4 Word 29: scanned out 0x01FC1F1D and scanned in 0x01FC1F1C. Scan tests: 4, skipped: 0, failed: 2 Do a test using 0x5533CCAA. Test 5 Word 8: scanned out 0x5533CCAA and scanned in 0x5533CCA2. Test 5 Word 10: scanned out 0x5533CCAA and scanned in 0x1133CCAA. Test 5 Word 11: scanned out 0x5533CCAA and scanned in 0x1533CCAA. The details of the first 8 errors have been provided. The utility will now report only the count of failed tests. Scan tests: 5, skipped: 0, failed: 3 Do a test using 0xAACC3355. Scan tests: 6, skipped: 0, failed: 4 Some of the values were corrupted - 7.3 percent. The JTAG DR Integrity scan-test has failed. [End: Texas Instruments XDS100v2 USB Debug Probe_0]
What could be causing the JTAG failures on the chip?