All:
I have a C5505 connected to an ADS1298 chip. There is a specification in the ADS1298 that states that 4 tclks (tclock = 1/ 2.048 MHz) are needed from the "eighth SCLK falling edge to CS high."
Does the SPI on the C5505 have a means of extending the Chip Select after an 8-bit action to allow for this? (Is there a register setting that will extend the rising edge of CS?)
Right now, a temporary solution is to slow the SPI clock down to allow this to happen.
For a 2.048 MHz input clock to the ADS1298, I need to clock the SPI at 2.048 / 8 = 250 Khz.
I would like to be able to run the SPI clock at a faster rate, preferably 2 MHz or even 4 MHz.
Regards,
Todd Anderson