MSP430FR2433: MSP430 I2C slave requires clock stretching for address ACK?

Part Number:MSP430FR2433

My setup consists of an MSP430FR2433 I2C slave running at 16Mhz. I2C master communication is done using a TI USB2ANY device. I'm noticing that the MSP430 needs to periodically stretch the I2C clock to keep up with the master. In the attached capture, clock stretching is required to ACK the address. I realize this is totally within the I2C specification, but I'm a little surprised that it can't keep up with a 100Khz I2C bus?

Here's my ISR:

#pragma vector=USCI_B0_VECTOR
__interrupt void USCIB0_ISR(void)
{
  switch(__even_in_range(UCB0IV, 0x1E))
  {
  case  0x00: break;   // Vector 00: No interrupts
  case  0x02: break;   // Vector 02: UCALIFG
  case  0x04: break;   // Vector 04: UCNACKIFG
  case  0x06:          // Vector 06: UCSTTIFG Start
    rxBuffIndex = 0;
    break;
  case  0x08:          // Vector 08: UCSTPIFG Stop
    stopSet = true;
    break;
  case 0x0A: break;   // Vector 0A: UCRXIFG3
  case 0x0C: break;   // Vector 0C: UCTXIFG3
  case 0x0E: break;   // Vector 0E: UCRXIFG2
  case 0x10: break;   // Vector 10: UCTXIFG2
  case 0x12: break;   // Vector 12: UCRXIFG1
  case 0x14: break;   // Vector 14: UCTXIFG1
  case 0x16:          // Vector 16: UCRXIFG0
    if(rxBuffIndex >= SLAVE_I2C_BUFF_SIZE)
    {
      // Generate NAK
      UCB0CTLW0 |= UCTXNACK;
      return;
    }
    rxBuff[rxBuffIndex++] = UCB0RXBUF;
    
    if(stopSet)
    {
      stopSet = false;
      if(dataRxCallback != NULL)
      {
        dataRxCallback(&rxBuff[0], rxBuffIndex);
      }
    }
    break;
  case 0x18:          // Vector 18: UCTXIFG0
    if(txBuff.dataIndex >= txBuff.maxNumBytes)
    {
      // Generate NAK
      UCB0CTLW0 |= UCTXNACK;
      return;
    }
    UCB0TXBUF = txBuff.dataPtr[txBuff.dataIndex++];
    break;
  case 0x1A: break;   // Vector 1A: UCBCNTIFG
  case 0x1C: break;   // Vector 1C: UCCLTOIFG
  case 0x1E: break;   // Vector 1E: UCBIT9IFG
  default: break;
  }
}