Part Number:UCC28780
I started using the data sheet for this extremely complex part, section 8.2.2 "Detailed Design Procedure", and found by the end of the page that it was pretty much useless. VCLAMP and VSPIKE are required to calculate turns ratio, and I couldn't find how to estimate them anywhere. Then in 8.2.2.2.2 I read "KRES represents the duty cycle loss to wait for the switch-node voltage transition from the reflected output voltage to zero. 5% to 6% of KRES is used as a initial estimated value." This seems to be a typo. It makes no sense and doesn't give a clue to estimating KRES. Then in eqn (23) at the bottom of the page I see where fSW(MIN) is required and no help anywhere for estimating it.
So by the end of just the first page of the procedure I was stymied and unable to calculate any of the variables. No actual numbers (for example, for the EVM design) are shown for any of the equations in section 8.2.2, either, so you can't cross check the formulas or piece together what the variables mean.
Fortunately I found the Mathcad documents in sluc644 and I have Mathcad. These are very helpful and look like they will make an actual design possible. I have found a couple errors in "ACF Power Stage Calculations - 21070531.xmcd" though:
- The min and max NPS calculations can come out with min > max, depending on the input variables. I have a high VBULK design, and I ended up with NPSmin = 7.265 and max = 5.302. Then, I had to use an NPS of 5 (outside the given inverted range) in order to pass the VDS_margin test. I think the worksheet needs more testing with wider input voltage range, and I'm not sure I'm getting the right turns ratio.
- The calculation for kZmax is wrong if VBULK > VRfl. I put a conditional test in there, but I'm not positive it's right.
- I still can't find help anywhere on the required voltage rating for the clamp capacitor.
Please let me know if you want my edited copy of this worksheet so far. The "insert file" button here doesn't look like it's working right.