Part Number:AM3358
Hello,
I'm initializing i2c-1 of am3358 in PRU Core.
Where I'm able see Slave address on sda pin using DSO.
But i cannot receive ACK. Always return with NACK
While the same hardware works on different setup.
Here i've attached my code.
#include "main.h"
#include "hw_types.h"
#include "error.h"
#include "delay.h"
#include "hsi2c.h"
#include "hw_hsi2c.h"
#include "hw_cm_per.h"
#define I2C0_BUS 0
#define I2C1_BUS 1
#define DELAY_MILLI_SEC 1
#define I2C_TIMEOUT 5
#define SUCCESS 1
#define FAIL 0
/** **************************************************************************
* clockInit
*
* brief
*
* This routine initializes the clock part for I2C on the Bases of BUS number
*
* Parameter busNum [IN] Bus Instance number
*
* Return
* NA
*
*/
void clockInit
(
uint8_t busNum
)
{
#ifdef centarus
HWREG(PINCNTL263) = I2C0_PIN_EN;
HWREG(PINCNTL264) = I2C0_PIN_EN;
/*Ensure the module is enabled and the clock to it is also enabled*/
HWREG(PRCM + CM_PER_I2C0_CLKCTRL) =
CM_PER_I2C0_CLKCTRL_MODULEMODE_ENABLE;
DELAYMilliSeconds(I2C_TIMEOUT);
/* Check the state is changed */
while (HWREG(CM_ALWON_I2C_0_CLKCTRL) & CM_PER_I2C2_CLKCTRL_IDLEST);
DELAYMilliSeconds(DELAY_MILLI_SEC);
*(uint32_t*)(PRCM + CM_PER_I2C1_CLKCTR) =
CM_PER_I2C0_CLKCTRL_MODULEMODE_ENABLE;
DELAYMilliSeconds(I2C_TIMEOUT);
/* Check the state is changed */
while ((*(uint32_t*) CM_ALWON_I2C_1_CLKCTRL) & CM_PER_I2C2_CLKCTRL_IDLEST);
DELAYMilliSeconds(DELAY_MILLI_SEC);
#else
// switch (busNum)
// {
// case I2C0_BUS:
/*Ensure the module is enabled and the clock to it is also enabled*/
HWREG(SOC_PRCM_REGS + CM_PER_I2C1_CLKCTRL) = CM_PER_I2C1_CLKCTRL_MODULEMODE_ENABLE;
// break;
// case I2C1_BUS:
/*Ensure the module is enabled and the clock to it is also enabled*/
HWREG(SOC_PRCM_REGS + CM_PER_I2C2_CLKCTRL) = CM_PER_I2C2_CLKCTRL_MODULEMODE_ENABLE;
// break;
// }
/* Wait till clock is inactive */
while(((HWREG(SOC_PRCM_REGS + CM_PER_L4LS_CLKSTCTRL)) & CM_PER_L4LS_CLKSTCTRL_CLKACTIVITY_I2C_FCLK)
== CM_PER_L4LS_CLKSTCTRL_CLKACTIVITY_I2C_FCLK_INACT);
#endif
}
/** **************************************************************************
* int16_t i2cInit()
* brief Routine to initialize the I2C
*
* This routine initializes the I2C instance as per given bus number.No use of
* interrupts here as the code is intended to carry out all I/O operations
* in polled mode.
*
* Parameter busNum [IN] Bus Instance number
*
* Return
* return SUCCESS for success - Description
* return FAIL for error - Description
*/
int16_t I2CInit
(
uint8_t busNum
)
{
int16_t retVal = SUCCESS;
uint16_t sclValues = 0;
uint32_t baseI2c = 0;
uint8_t flag=0;
uint16_t delayCnt = 1000;
switch (busNum)
{
case I2C0_BUS:
baseI2c = SOC_I2C_0_REGS;
break;
case I2C1_BUS:
baseI2c = SOC_I2C_1_REGS;
break;
default:
retVal = E_INVALID_PARAM;
return retVal;
}
if (SUCCESS == retVal)
{
#ifdef centarus
;
#else
/* Setting PINMUX Required for I2C*/
// pinmuxSetting(busNum);
#endif
/*Setting Clock as Required for I2C to Work*/
clockInit(busNum);
/* Reset all the registers */
HWREG(baseI2c + I2C_CON) = 0;
HWREG(baseI2c + I2C_PSC) = 0;
HWREG(baseI2c + I2C_SCLL) = 0;
HWREG(baseI2c + I2C_SCLH) = 0;
HWREG(baseI2c + I2C_BUF) = 0;
HWREG(baseI2c + I2C_SYSC) = 0;
HWREG(baseI2c + I2C_WE) = 0;
HWREG(baseI2c + I2C_IRQSTATUS) = 0;
delay_ms(1);
/* soft-reset the I2c Controller */
HWREG(baseI2c + I2C_SYSC) = I2C_SYSC_SRST;
/* I2C requires to be enabled for reset to complete */
HWREG(baseI2c + I2C_CON) = I2C_CON_I2C_EN;
/* wait for reset */
while (I2C_SYSC_SRST_RESET != flag)
{
flag = ( HWREG(baseI2c + I2C_SYSC) & I2C_SYSC_SRST_RESET) ;
delayCnt--;
delay_ms(1);
if (delayCnt <= 0) break;
}
if (delayCnt == 0)
{
retVal = FAIL;
return(retVal);
}
delay_ms(I2C_TIMEOUT);
/* Wake Up*/
HWREG(baseI2c + I2C_SYSC) = I2C_SYSC_ENAWAKEUP;
// |I2C_SYSC_AUTOIDLE
// /*NO IDLE MODE*/
// | (I2C_SYSC_IDLEMODE_SMARTIDLE << I2C_SYSC_IDLEMODE_SHIFT);
// /*CLOCK ACTIVITY IN FUNCTIONAL MODE*/
// | (I2C_SYSC_CLKACTIVITY_FUNC << I2C_SYSC_CLKACTIVITY_SHIFT);
/* Disable the controller */
HWREG(baseI2c + I2C_CON) = 0;
/* compute the PSC value */
// if (HSI2C_BUS_CLOCK > I2C_TIMEOUT)
// {
/* I2C PRESCALE settings. */
HWREG(baseI2c + I2C_PSC) = 0xb;//HSI2C_PRESCALE_DIV1;
// sclValues = HSI2C_INTERNAL_CLOCK1 / HSI2C_BUS_CLOCK;
// }
// else
// {
// /* I2C PRESCALE settings. */
// HWREG(baseI2c + I2C_PSC) = HSI2C_PRESCALE_DIV2;
// sclValues = HSI2C_INTERNAL_CLOCK2 / HSI2C_BUS_CLOCK;
// }
/* Disable & clear all the Interrupts */
HWREG(baseI2c + I2C_IRQENABLE_CLR) = 0xFFFFFFFF;//HSI2C_IRQDISABLE_ALL;
/* set the SCL Low and High time */
HWREG(baseI2c + I2C_SCLL) = 0xd;
HWREG(baseI2c + I2C_SCLH) = 0xf;
// HWREG(baseI2c + I2C_SCLL) = sclValues - HI2C_SCLL_VAL;
// HWREG(baseI2c + I2C_SCLH) = sclValues - HI2C_SCLH_VAL;
/* Set the self address */
HWREG(baseI2c + I2C_OA) = 0;//I2C_OA_OA & OWN_ADD;
/* Enable the I2C controller */
HWREG(baseI2c + I2C_CON) = I2C_CON_I2C_EN;
/* set the slave address */
HWREG(baseI2c + I2C_SA) = (int16_t) NULL;;
/* Set data count */
HWREG(baseI2c + I2C_CNT) = (int16_t) NULL;
HWREG(baseI2c + I2C_WE) = I2C_WE_AL | I2C_WE_NACK | I2C_WE_ARDY | I2C_WE_DRDY ;
}
return (retVal);
}
void DELAYSeconds(int sec)
{
int k=0;
for(k=0;k<2000;k++){}
}
typedef enum {
I2C_TRANSFER_SUCCESS=0,
I2C_ARBITRATION_LOST,
I2C_NACK_RECEIVED,
I2C_ACCESS_ERROR,
I2C_BUS_BUSY,
I2C_RECEIVE_OVERRUN,
I2C_TIMEOUT_ERROR,
I2C_INVALID_PARAM,
I2C_AAS_SLAVE_ADDR,
I2C_INVALID_ERROR
}I2C_ERROR_CODE_Type;
uint32_t I2C_GetBaseAddress(uint8_t busNum)
{
uint32_t baseI2c=0;
switch (busNum)
{
case I2C0_BUS:
baseI2c = SOC_I2C_0_REGS;
break;
case I2C1_BUS:
baseI2c = SOC_I2C_1_REGS;
break;
default:
return I2C_INVALID_PARAM;
}
return baseI2c;
}
I2C_ERROR_CODE_Type I2C_ErrorHandling(uint32_t baseAddress)
{
uint32_t status=0;
status = HWREG(baseAddress + I2C_IRQSTATUS);
if (I2C_IRQSTATUS_RAW_AL_LOST == (status & I2C_IRQSTATUS_RAW_AL)) {
HWREG(baseAddress + I2C_IRQSTATUS) |= I2C_IRQSTATUS_RAW_AL;
return I2C_ARBITRATION_LOST;
}
if (I2C_IRQSTATUS_RAW_AERR == (status & I2C_IRQSTATUS_RAW_AERR)) {
HWREG(baseAddress + I2C_IRQSTATUS) |= I2C_IRQSTATUS_RAW_AERR;
return I2C_ACCESS_ERROR;
}
if (I2C_IRQSTATUS_RAW_NACK == (status & I2C_IRQSTATUS_RAW_NACK)) {
HWREG(baseAddress + I2C_IRQSTATUS) |= I2C_IRQSTATUS_RAW_NACK;
return I2C_NACK_RECEIVED;
}
if(I2C_IRQSTATUS_RAW_ROVR == (status & I2C_IRQSTATUS_RAW_ROVR)) {
HWREG(baseAddress + I2C_IRQSTATUS) |= I2C_IRQSTATUS_RAW_ROVR;
return I2C_RECEIVE_OVERRUN;
}
if(I2C_IRQSTATUS_RAW_AAS == (status & I2C_IRQSTATUS_RAW_AAS)) {
HWREG(baseAddress + I2C_IRQSTATUS) |= I2C_IRQSTATUS_RAW_AAS;
// return I2C_AAS_SLAVE_ADDR;
}
return I2C_TRANSFER_SUCCESS;
}
/** **************************************************************************
* \n \brief Routine to read data from slave device the I2C - 0
*
* This routine initializes the I2C controller for reading from the slave
* peripheral connected to the bus. This function takes the slave address
* as a parameter along with the read buffer pointer and the length of buffer.
* This function returns the number of bytes read into the output length pointer.
*
* busNum [IN] I2C Bus number
* slaveAddr [IN] I2C Slave address to read from
* buffer [OUT] Buffer pointer to copy data into
* bufLen [IN] Length of the input buffer pointer
* pDataRead [OUT] Place holder to return read number of bytes
*
* \return
* \n return SUCCESS for success - Description
* \n return FAIL for error - Description
*/
I2C_ERROR_CODE_Type I2CRead
(
uint8_t busNum,
uint16_t slaveAddr,
uint8_t *buffer,
uint8_t bufLen,
uint8_t *pDataRead
)
{
I2C_ERROR_CODE_Type retVal = I2C_TRANSFER_SUCCESS;
uint16_t status = 0;
uint8_t bytesRead = 0;
uint8_t* pDataPtr = NULL; /*Pointer to save received data*/
uint32_t timeOut = I2C_TIMEOUT;
uint32_t baseI2c = 0;
/* input parameter validation */
if ((NULL != buffer) && (0 != bufLen) && (NULL != pDataRead)){
pDataPtr = buffer;
}else{
return I2C_INVALID_PARAM;
}
baseI2c = I2C_GetBaseAddress(busNum);
if(baseI2c == I2C_INVALID_PARAM) return I2C_INVALID_PARAM;
/* set the slave address */
HWREG(baseI2c + I2C_SA) = slaveAddr & I2C_SA_SA;
/* set the count */
HWREG(baseI2c + I2C_CNT) = bufLen;
/* Poll for the bus to become free/idle */
for (timeOut = 0; timeOut < I2C_TIMEOUT; timeOut++)
{
if (I2C_IRQSTATUS_RAW_BB_FREE == (HWREG(baseI2c + I2C_IRQSTATUS) & I2C_IRQSTATUS_RAW_BB)) break;
}
if (timeOut == I2C_TIMEOUT) return I2C_TIMEOUT_ERROR;
/* configure the I2C bus as master for receiving mode */
HWREG(baseI2c + I2C_CON) = I2C_CON_I2C_EN | I2C_CON_MST | I2C_CON_TRX_RCV | I2C_CON_STP | I2C_CON_STT;
/* in THIS loop till we have TO read all the data or we have timed-out,
* read the data from I2C data register and return
*/
for (timeOut = 0; timeOut < I2C_TIMEOUT; timeOut++)
{
status = HWREG(baseI2c + I2C_IRQSTATUS);
/* Check for NACK*/
if (0 == (status & I2C_IRQSTATUS_RAW_NACK))
{
/* ACK received. Now check for data ready */
if (0 == (status & I2C_IRQSTATUS_RAW_ARDY))
{
/* check for RRDY for data availability */
if (I2C_IRQSTATUS_RAW_RRDY == (status & I2C_IRQSTATUS_RAW_RRDY ))
{
/* check if we have buffer space available */
if (bytesRead < bufLen)
{
/* data is available. Read it now and ACK */
*pDataPtr++ = (HWREG(baseI2c + I2C_DATA)) & I2C_DATA_DATA;
bytesRead++;
}
/* clear the RRDY bits */
HWREG(baseI2c + I2C_IRQSTATUS) = I2C_IRQSTATUS_RAW_RRDY;
}
}
retVal = I2C_ErrorHandling(baseI2c);
if(retVal != I2C_TRANSFER_SUCCESS) return retVal;
delay_ms(10);
}
else
{
/* clear the NACK bits */
HWREG(baseI2c + I2C_IRQSTATUS) = (I2C_IRQSTATUS_RAW_NACK_CLEAR << I2C_IRQSTATUS_RAW_NACK_SHIFT);
return I2C_NACK_RECEIVED;
}
}
/* before returning, update the return counts too */
if (NULL != pDataRead) *pDataRead = bytesRead;
return I2C_TRANSFER_SUCCESS;
}
/** **************************************************************************
* \n \brief Routine to write data from slave device the I2C - 0
*
* This routine initializes the I2C controller for writing to the slave
* peripheral connected to the bus. This function takes the slave address
* as a parameter along with the write buffer pointer and the length of buffer.
* This function returns the number of bytes written into the output length pointer.
*
* busNum [IN] I2C Bus number
* slaveAddr [IN] I2C Slave address to read from
* buffer [OUT] Buffer pointer to copy data into
* bufLen [IN] Length of the input buffer pointer
* pDataRead [OUT] Place holder to return read number of bytes
*
* Return
* return SUCCESS for success - Description
* return FAIL for error - Description
*/
I2C_ERROR_CODE_Type I2CWrite
(
uint8_t busNum,
uint16_t slaveAddr,
uint8_t *buffer,
uint8_t bufLen,
uint8_t *dataWritten
)
{
I2C_ERROR_CODE_Type retVal = I2C_TRANSFER_SUCCESS;
uint16_t status = 0;
uint8_t bytesWritten = 0;
uint32_t timeOut = I2C_TIMEOUT;
uint32_t baseI2c = 0;
if ((NULL == buffer) || (0 == bufLen) || (NULL == dataWritten )) {
return I2C_INVALID_PARAM;
}
/* Assign the I2C register base */
baseI2c = I2C_GetBaseAddress(busNum);
if(baseI2c == I2C_INVALID_PARAM) return I2C_INVALID_PARAM;
/* just to ensure the previous transactions flags are cleared */
HWREG(baseI2c + I2C_IRQSTATUS ) = I2C_CNT_DCOUNT;
delay_ms(1);
/* set the slave address */
HWREG(baseI2c + I2C_SA) = (slaveAddr << 1) & I2C_SA_SA;
delay_ms(1);
ConsoleUtilsPrintf("\n Slave Addr:0x%x",HWREG(baseI2c + I2C_SA));
/* set the count */
HWREG(baseI2c + I2C_CNT) = bufLen;
delay_ms(1);
ConsoleUtilsPrintf("\n Buffer Length:0x%x",HWREG(baseI2c + I2C_CNT));
/* Poll for the bus to become free/idle */
for (timeOut = 0; timeOut < I2C_TIMEOUT; timeOut++)
{
if (I2C_IRQSTATUS_RAW_BB_FREE == (HWREG(baseI2c + I2C_IRQSTATUS) & I2C_IRQSTATUS_RAW_BB)) break;
}
/*********/
if (timeOut == I2C_TIMEOUT) return I2C_TIMEOUT_ERROR;
/* configure the I2C bus as master for receiving mode */
HWREG(baseI2c + I2C_CON) = I2C_CON_I2C_EN | I2C_CON_MST | I2C_CON_TRX_TRX | I2C_CON_STP;
// delay_ms(1);
// ConsoleUtilsPrintf("\n I2C Control:0x%x",HWREG(baseI2c + I2C_CON));
/* Loop till we have written all the data or we have timed-out */
// for (timeOut = 0; timeOut < I2C_TIMEOUT; timeOut++)
// {
HWREG(baseI2c + I2C_CON) |= I2C_CON_STT;
// __delay_cycles(5000);
ConsoleUtilsPrintf("\n CON:0x%x",HWREG(baseI2c + I2C_CON));
// __delay_cycles(5000);
while(1)
{
timeOut++;
if(timeOut == I2C_TIMEOUT) return I2C_TIMEOUT_ERROR;
/* clear the AL bits */
// HWREG(baseI2c + I2C_IRQSTATUS) = I2C_IRQSTATUS_RAW_AL_CLEAR;
status = HWREG(baseI2c + I2C_IRQSTATUS);
// __delay_cycles(5000);
ConsoleUtilsPrintf("\n RAW Status:0x%x",HWREG(baseI2c + I2C_IRQSTATUS_RAW));
// __delay_cycles(5000);
ConsoleUtilsPrintf("\n Status:0x%x",status);
/* Check for NACK*/
if(!(status & I2C_IRQSTATUS_RAW_NACK))
{
/* ACK received. Now check for data ready */
if(!(status & I2C_IRQSTATUS_RAW_ARDY))
{
/* check for XRDY for data availability */
if(status & I2C_IRQSTATUS_RAW_XRDY)
{
ConsoleUtilsPrintf("\n Update Data.");
/* check if we have buffer space available */
if(bytesWritten < bufLen)
{
/* Write the data and ACK */
HWREG(baseI2c + I2C_DATA) = (*buffer++ & I2C_DATA_DATA);
delay_ms(1);
bytesWritten++;
}
/* check if we have buffer space available */
/* clear the XRDY bits */
HWREG(baseI2c + I2C_IRQSTATUS) = (I2C_IRQSTATUS_RAW_XRDY_CLEAR << I2C_IRQSTATUS_RAW_XRDY_SHIFT);
delay_ms(1);
}
else
{
/* loop through to make another attempt */
ConsoleUtilsPrintf("\n XRDY Not Available|:0x%x",status);
// retVal = I2C_ErrorHandling(baseI2c);
if(retVal != I2C_TRANSFER_SUCCESS)
return I2C_INVALID_ERROR;
}
}
else
{
ConsoleUtilsPrintf("\n Register Access Not Available:0x%x",status);
}
if (bytesWritten == bufLen) delay_ms(I2C_TIMEOUT);
retVal = I2C_ErrorHandling(baseI2c);
if(retVal != I2C_TRANSFER_SUCCESS) return retVal;
}
else
{
// retVal = FAIL;
ConsoleUtilsPrintf("\n Received NACK");
retVal = I2C_ErrorHandling(baseI2c);
if(retVal != I2C_TRANSFER_SUCCESS) return retVal;
// /* clear the NACK bits */
// HWREG(baseI2c + I2C_IRQSTATUS) = (I2C_IRQSTATUS_RAW_NACK_CLEAR << I2C_IRQSTATUS_RAW_NACK_SHIFT);
// return I2C_NACK_RECEIVED;
}
}
/* before returning, update the return counts too */
if (NULL != dataWritten){
*dataWritten = bytesWritten;
ConsoleUtilsPrintf("\n Data Written:%d,%d",*dataWritten,bytesWritten);
}
return I2C_TRANSFER_SUCCESS;
}
#define I2C_READ 0x21
#define I2C_WRITE 0x21
#define REG_BIT_MASK (0x1F)
#define REG_IDX_SHIFT (0x05)
void init_i2c1(void)
{
// Need to Enable Clock & I2C Peripheral
I2CInit(I2C1_BUS);
HWREG(SOC_I2C_1_REGS + I2C_IRQENABLE_SET) = I2C_IRQENABLE_SET_AL_IE | I2C_IRQENABLE_SET_NACK_IE |
I2C_IRQENABLE_SET_ROVR | I2C_IRQENABLE_SET_RRDY_IE | I2C_IRQENABLE_SET_ARDY_IE |
I2C_IRQENABLE_SET_XRDY_IE | I2C_IRQENABLE_SET_XDR_IE | I2C_IRQENABLE_SET_RDR_IE;
__delay_cycles(5000);
ConsoleUtilsPrintf("\n Interrupt Set:0x%x",HWREG(SOC_I2C_1_REGS + I2C_IRQENABLE_SET));
}
void read_productid(void)
{
uint8_t product_command1[2] = {0x36,0x7C};
uint8_t soft_reset_cmd[2] = {0x00,0x06};
uint8_t product_command2[2] = {0xE1,0x02};
uint8_t return_product_id[20];
uint8_t read_bytes=0,write_bytes=0;
int16_t i;
I2C_ERROR_CODE_Type errorCode;
memset(return_product_id,0x00,sizeof return_product_id);
errorCode = I2CWrite(I2C1_BUS,I2C_WRITE,soft_reset_cmd,2,&write_bytes);
if(errorCode != I2C_TRANSFER_SUCCESS) ConsoleUtilsPrintf("\n Error writing data ,bytes:%d | error:%d",write_bytes,errorCode);
else
{
ConsoleUtilsPrintf("\n Writing Command Code 1.");
errorCode = I2CWrite(I2C1_BUS,I2C_WRITE,product_command1,2,&write_bytes);
if(errorCode != I2C_TRANSFER_SUCCESS) ConsoleUtilsPrintf("\n Error writing data ,bytes:%d | error:%d",write_bytes,errorCode);
else {
delay_ms(2);
ConsoleUtilsPrintf("\n Writing Command Code 2. ,Bytes:%d",write_bytes);
errorCode = I2CWrite(I2C1_BUS,I2C_WRITE,product_command2,2,&write_bytes);
if(errorCode != I2C_TRANSFER_SUCCESS) ConsoleUtilsPrintf("\n Error writing data ,bytes:%d | error:%d",write_bytes,errorCode);
else {
delay_ms(2);
ConsoleUtilsPrintf("\n Reading Product Data. ,Bytes:%d",write_bytes);
errorCode = I2CRead(I2C1_BUS,I2C_READ,return_product_id,18,&read_bytes);
if(errorCode != I2C_TRANSFER_SUCCESS) ConsoleUtilsPrintf("\n Error Reading data ,bytes:%d | error:%d",read_bytes,errorCode);
else {
ConsoleUtilsPrintf("\n Reading Successful. ,Bytes:%d",read_bytes);
}
}
}
if(errorCode == I2C_TRANSFER_SUCCESS){
// Print Product Id
ConsoleUtilsPrintf("\n Product Id.");
for(i=0;i<20;i++)
{
ConsoleUtilsPrintf("\nBYTE[%d]:0x%02x",i,return_product_id[i]);
}
}
}
}
void read_i2c_register(uint8_t i2cBus)
{
uint32_t i2cAddr=0,clkAddr=0;
if(i2cBus == 0)
{
i2cAddr = SOC_I2C_0_REGS;
clkAddr = CM_PER_I2C1_CLKCTRL;
}
else
{
i2cAddr = SOC_I2C_1_REGS;
clkAddr = CM_PER_I2C2_CLKCTRL;
}
ConsoleUtilsPrintf("\n*****************************************************");
ConsoleUtilsPrintf("\n************* I2C Bus: %d at 0x%x **************",i2cBus,i2cAddr);
ConsoleUtilsPrintf("\n*****************************************************");
ConsoleUtilsPrintf("\n CM_PER_I2C_CLKCTRL[0x%x]:0x%x",clkAddr,HWREG(SOC_PRCM_REGS + clkAddr));
ConsoleUtilsPrintf("\n I2C_REVNB_LO:0x%x",HWREG(i2cAddr + I2C_REVNB_LO));
ConsoleUtilsPrintf("\n I2C_REVNB_HI:0x%x",HWREG(i2cAddr + I2C_REVNB_HI));
ConsoleUtilsPrintf("\n I2C_SYSC:0x%x",HWREG(i2cAddr + I2C_SYSC));
ConsoleUtilsPrintf("\n I2C_EOI:0x%x",HWREG(i2cAddr + I2C_EOI));
ConsoleUtilsPrintf("\n I2C_IRQSTATUS_RAW:0x%x",HWREG(i2cAddr + I2C_IRQSTATUS_RAW));
ConsoleUtilsPrintf("\n I2C_IRQSTATUS:0x%x",HWREG(i2cAddr + I2C_IRQSTATUS));
ConsoleUtilsPrintf("\n I2C_IRQENABLE_SET:0x%x",HWREG(i2cAddr + I2C_IRQENABLE_SET));
ConsoleUtilsPrintf("\n I2C_IRQENABLE_CLR:0x%x",HWREG(i2cAddr + I2C_IRQENABLE_CLR));
ConsoleUtilsPrintf("\n I2C_WE:0x%x",HWREG(i2cAddr + I2C_WE));
ConsoleUtilsPrintf("\n I2C_DMARXENABLE_SET:0x%x",HWREG(i2cAddr + I2C_DMARXENABLE_SET));
ConsoleUtilsPrintf("\n I2C_DMATXENABLE_SET:0x%x",HWREG(i2cAddr + I2C_DMATXENABLE_SET));
ConsoleUtilsPrintf("\n I2C_DMARXENABLE_CLR:0x%x",HWREG(i2cAddr + I2C_DMARXENABLE_CLR));
ConsoleUtilsPrintf("\n I2C_DMATXENABLE_CLR:0x%x",HWREG(i2cAddr + I2C_DMATXENABLE_CLR));
ConsoleUtilsPrintf("\n I2C_DMARXWAKE_EN:0x%x",HWREG(i2cAddr + I2C_DMARXWAKE_EN));
ConsoleUtilsPrintf("\n I2C_DMATXWAKE_EN:0x%x",HWREG(i2cAddr + I2C_DMATXWAKE_EN));
ConsoleUtilsPrintf("\n I2C_SYSS:0x%x",HWREG(i2cAddr + I2C_SYSS));
ConsoleUtilsPrintf("\n I2C_BUF:0x%x",HWREG(i2cAddr + I2C_BUF));
ConsoleUtilsPrintf("\n I2C_CNT:0x%x",HWREG(i2cAddr + I2C_CNT));
ConsoleUtilsPrintf("\n I2C_DATA:0x%x",HWREG(i2cAddr + I2C_DATA));
ConsoleUtilsPrintf("\n I2C_CON:0x%x",HWREG(i2cAddr + I2C_CON));
ConsoleUtilsPrintf("\n I2C_OA:0x%x",HWREG(i2cAddr + I2C_OA));
ConsoleUtilsPrintf("\n I2C_SA:0x%x",HWREG(i2cAddr + I2C_SA));
ConsoleUtilsPrintf("\n I2C_PSC:0x%x",HWREG(i2cAddr + I2C_PSC));
ConsoleUtilsPrintf("\n I2C_SCLL:0x%x",HWREG(i2cAddr + I2C_SCLL));
ConsoleUtilsPrintf("\n I2C_SCLH:0x%x",HWREG(i2cAddr + I2C_SCLH));
ConsoleUtilsPrintf("\n I2C_SYSTEST:0x%x",HWREG(i2cAddr + I2C_SYSTEST));
ConsoleUtilsPrintf("\n I2C_BUFSTAT:0x%x",HWREG(i2cAddr + I2C_BUFSTAT));
ConsoleUtilsPrintf("\n I2C_ACTOA:0x%x",HWREG(i2cAddr + I2C_ACTOA));
ConsoleUtilsPrintf("\n I2C_SBLOCK:0x%x",HWREG(i2cAddr + I2C_SBLOCK));
ConsoleUtilsPrintf("\n*****************************************************");
}