Part Number:DRV8703-Q1
My customer is asking the following questions concerning the DRV8703-Q1:
We will be using SPI to program the gains and thresholds. But initially we thought to make sure we drive the motor through hardwired signals.
So, the SPI pins are left open. The chip select is not used, and this is only used if we want to do the SPI comm.
The Vref pin we currently have it connected to 3.3V. Yes, we are operating in default mode.
With nSLEEP low, the voltage seen on SH1 and SH2 are 0V (mv range) as expected. But when nSLEEP is HIGH, the SH1 and SH2 are 0.747V. Same voltages observed at GH1 and GH2. But GL1 and GL2 are in mV range. When in Hi-Z, the voltages should be all 0V.
The data sheet does not provide details on how SH1/SH2 are used within the chip. Is the driver IC sourcing any voltage on these 2 pins, which in turn might feed back to GH1/GH2 ? The above voltages are seen when SH1/SH2 are not connected to our controller.
Now, if we connect our controller, then the voltages are little different because we have a ladder network for detecting off state faults on the load. This ladder network is pulled up with 12v, and if SH1/SH2 are Hi-Z, then I expect a voltage based on ladder network. But as the driver chip is sourcing some voltage we see much lower voltages.
What does TI's recommendation for off state diagnostics? I understand that the driver IC can detect the over current/temperature, but this could happen only if we drive the motor. We need to detect the faults before to inhibit driving the motor if there is fault detected (STG, STB or Open circuit). The ladder network helps doing this.
Can the customer use the ladder network that he is referring to? Is it normal to see voltages on SH1/SH2? This seems like a diode drop, but I cannot tell. This is the main reason for the questions.
Thanks for your help with this!
Richard Elmquist