RM57L843: ASYNC EMIF interface address gap

Part Number:RM57L843

Hi,

I wirte to the DPRAM data with this simple code:

unsigned int Ext_Async_Mem_Write2(unsigned int Ext_Mem_Address_Ptr, unsigned int Data_To_Write_Ptr, unsigned int No_Of_32BitData)
{
unsigned short *Addr = (unsigned short *) Ext_Mem_Address_Ptr;

while(No_Of_32BitData > 0)
{

*Addr++ = Data_To_Write_Ptr++;

No_Of_32BitData--;

}
return 0;
}

On the digital analyser I see only the addresses 001, 003, 005 but the data is in the right order, check the pic attached. I don't unterstand why?