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RTOS/TMS320C6678: PCIe BAR Data read from FPGA endpoint

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Part Number:TMS320C6678

Tool/software:TI-RTOS

Hello,

I am trying to read data using a C6678 customized board using PCIe. The C6678 is the RC and the FPGA is the EP on the PCIe bus.

I am able to perform link training and reading remote device ID and vendor ID, but they are swapped in order, that may be because of endianess mismatch.

I am following the example in the PCIE_exampleProject and also some modifications that I found on the TI E2E forum.

On FPGA side i have configured BAR0 and BAR1 of size 8MB.

On C6678 DSP side i configured outbound translation for region 1 and region 2.

Region 1: LO: 0x00100001, HI: 0x0

Region 2: LO: 0x00200001, HI: 0x0

After that i configured remote BARs of FPGA.

BAR0

pcieBarCfg_t     barCfg;
barCfg.location = pcie_LOCATION_REMOTE;
barCfg.mode     = pcie_EP_MODE;
barCfg.base     = 0x00100000;
barCfg.prefetch = pcie_BAR_NON_PREF;
barCfg.type     = pcie_BAR_TYPE32;
barCfg.memSpace = pcie_BAR_MEM_MEM;
barCfg.idx      = 0;

BAR1

pcieBarCfg_t     barCfg;
barCfg.location = pcie_LOCATION_REMOTE;
barCfg.mode     = pcie_EP_MODE;
barCfg.base     = 0x00200000;
barCfg.prefetch = pcie_BAR_NON_PREF;
barCfg.type     = pcie_BAR_TYPE32;
barCfg.memSpace = pcie_BAR_MEM_MEM;
barCfg.idx      = 1;
outbound translation and BAR configuration has been completed successfully.
But when i am trying to read data from region 1 (0x60800000) and region 2 (0x61000000), i am getting data alternates between 0x60800000 and an sequence starting with 0x01 that increases in steps of 2.
Please let me know which steps i am missing out in configuration and data reading.
Thanks

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