Part Number:TCI6638K2K
Tool/software: Linux
We are using the HPLIBMOD kernel module for DDR memory allocations in ARM and for data transfer from ARM to DSP. We are facing the problem that the data written from ARM is not seen correctly at DSP side, as DSP application is still reading out the old values from the DDR memory. For DSP implementation, we do use the L2 invalidate function before reading from the DDR memory location. For ARM side, we do use hplib_cache.h header file (mcsdk_linux_3_01_04_07_syslib4/linux-devkit-rt/sysroots/cortexa15t2hf-vfp-neon-linux-gnueabi/usr/include/ti/runtime/hplib/hplib_cache.h) that does provide the hplib_cacheWbInv() type of functions. In this file, we see that the cache functions are empty unless CORTEX_A8 is defined by the user ARM application.
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 | static inline hplib_RetValue hplib_cacheWbInv(void *ptr, size_t size) { #ifdef CORTEX_A8 struct hplibmod_block block;
if (((uint8_t*)ptr <hplib_VM_mem_start)||( (uint8_t*)ptr>hplib_VM_mem_end)) return hplib_FAILURE; block.addr = (unsigned long)ptr; block.size = size;
if (ioctl(hplib_mod_fd, HPLIBMOD_IOCCACHEWBINV | HPLIBMOD_IOCMAGIC, &block) == -1) { return hplib_FAILURE; } #else (void)ptr; (void)size; #endif return hplib_OK; } |
Accordingly, we have defined CORTEX_A8 in our ARM application. C6638 on the other hand does have Cortex A-15. May you clarify what is the correct way to use the cache operations with HPLIBMOD kernel module on C6638 ARM core Linux application?