Hello,
reading through the Technical Reference Manual for TDA2XX I understood that the PCIe controller instantiates 2 subsystems which can operate in following usecases:
1) Only subsystem 1 working in x1 mode
2) Only subsystem 2 working in x1 mode
3) Subsystem 1 and subsystem 2 both working in x1 mode simultaneously
4) Subsystem 1 working in x2 mode while subsystem 2 cannot be used
I'm working on PROCESSOR_SDK_VISION_03_02_00_00 and have successfully tried usecases 1 and 4. However I'm trying variant 2 and 3 right now. When I do the programming of the PCIe subsystems I refer to the tables that contain typical programming sequences that I found in Technical Reference Manual for TDA2XX. The testing is done using PCIe example from PDK.
I'm working on utilizing only subsystem 2 in x1 mode, first. The initialization of the clocks and PHY pass correctly but when it comes to choosing which type of pcie the subsystem will be (RC or EP) the execution hangs. Important thing to say is that this happened for the first time when programming SS2, haven't had those problems with SS1.
Therefore I have a few questions:
1) The SoC that I'm using is TDA2SX whereas the documentation that I refer to is for TDA2XX. Are those two the same and can I assume that there are indeed two PCIe subsystems in my SoC?
2) If there are 2 PCIe subsystems, why does the execution hang during RC/EP mode choice? I was mimicking the code that is present in the test for SS1 but also following the programming sequence table from TRM (that is for pcie_app.c). In the RC and EP parts of the test I just replaced every ocurrence of "SS1" with "SS2" (the code of course compiles and builds and I am able to run it).
Thank you in advance.
Regards,
Nick