Hi,
I'm trying to get a ping out from u-boot on a custom board I'm working on. This board is very similar to the beaglebone, the difference being that our board uses a lan8720 PHY on RMII with PHY_ID 1 while they have a lan8710 on MII with PHY_ID 0.
I adjusted the u-boot-ti/master branch to account for hardware modifications with this set of patches [2]. Basically, I configure the gmii_sel register properly (enable RMII1 and disables the rest, source clock from chip's PLL [I'm aware of Silicon Errata Advisory 1.0.16 and we are working on installing an external oscillator], adjust PHY_ADDR to 1, and adjust the pinmux).
With this setup, I can't see anything coming up on the remote interface. To pinpoint the issue, I added the ethloop command found here[3] to u-boot and tested with both mac (digital loop, bit 1 in the MACCONTROL register) and phy (bit 14 in the MII register 0) loops enabled. The mac loop worked, while the phy loop failed, which seems to point to an issue with the RMII bus. I did some probing on the board, and couldn't observe any signal on any of the TX pins (TXEN, TXD0 or TXD1). I though maybe it could have been a hardware issue, but I was able to configure the pins as GPIOs and toggle them.
Did I miss a configuration step? Is there anything else that could prevent data from being sent on the RMII interface? I understand that the silicon errata influences the RX side and therefore prevent a succesful ping (ARP reply might not be received properly), but still, wireshark on the other end of the cable should see the ARP request coming in.
[1] http://permalink.gmane.org/gmane.comp.boot-loaders.u-boot/16382
[2]
--- a/board/ti/am335x/board.c
+++ b/board/ti/am335x/board.c
@@ -42,8 +42,13 @@ static struct wd_timer *wdtimer = (struct wd_timer *)WDT_BASE;
static struct uart_sys *uart_base = (struct uart_sys *)DEFAULT_UART_BASE;
#endif
/* MII mode defines */
#define MII_MODE_ENABLE 0x0
+#define RMII_MODE_ENABLE 0x3D
#define RGMII_MODE_ENABLE 0x3A
/* GPIO that controls power to DDR on EVM-SK */
@@ -409,6 +430,10 @@ int board_eth_init(bd_t *bis)
writel(MII_MODE_ENABLE, &cdev->miisel);
cpsw_slaves[0].phy_if = cpsw_slaves[1].phy_if =
PHY_INTERFACE_MODE_MII;
+ } else if (board_is_MYBOARD()) {
+ writel(RMII_MODE_ENABLE, &cdev->miisel);
+ cpsw_slaves[0].phy_if = cpsw_slaves[1].phy_if =
+ PHY_INTERFACE_MODE_RMII;
} else {
writel(RGMII_MODE_ENABLE, &cdev->miisel);
cpsw_slaves[0].phy_if = cpsw_slaves[1].phy_if =
--- a/board/ti/am335x/mux.c
+++ b/board/ti/am335x/mux.c
@@ -152,6 +152,20 @@ static struct module_pin_mux rgmii1_pin_mux[] = {
{-1},
};
+static struct module_pin_mux rmii1_pin_mux[] = {
+ {OFFSET(mii1_rxd0), MODE(1) | RXACTIVE}, /* RMII1_RXD0 */
+ {OFFSET(mii1_rxd1), MODE(1) | RXACTIVE}, /* RMII1_RXD1 */
+ {OFFSET(mii1_rxerr), MODE(1) | RXACTIVE}, /* RMII1_RXERR */
+ {OFFSET(mii1_txen), MODE(1)}, /* RMII1_TXEN */
+ {OFFSET(mii1_txd0), MODE(1)}, /* RMII1_TXD0 */
+ {OFFSET(mii1_txd1), MODE(1)}, /* RMII1_TXD1 */
+ {OFFSET(mii1_crs), MODE(1) | RXACTIVE}, /* RMII1_CRS_DV */
+ {OFFSET(rmii1_refclk), MODE(0)}, /* RMII1_REFCLK */
+ {OFFSET(mdio_data), MODE(0) | RXACTIVE | PULLUP_EN},/* MDIO_DATA */
+ {OFFSET(mdio_clk), MODE(0) | PULLUP_EN}, /* MDIO_CLK */
+ {-1},
+};
+
static struct module_pin_mux mii1_pin_mux[] = {
{OFFSET(mii1_rxerr), MODE(0) | RXACTIVE}, /* MII1_RXERR */
{OFFSET(mii1_txen), MODE(0)}, /* MII1_TXEN */
@@ -303,7 +317,11 @@ void enable_board_pin_mux(struct am335x_baseboard_id *header)
configure_module_pin_mux(i2c1_pin_mux);
configure_module_pin_mux(mii1_pin_mux);
configure_module_pin_mux(mmc0_pin_mux);
- configure_module_pin_mux(mmc1_pin_mux);
+ } else if (!strncmp(header->name, "MYBOARD", HDR_NAME_LEN)) {
+ configure_module_pin_mux(i2c1_pin_mux);
+ configure_module_pin_mux(rmii1_pin_mux);
+ configure_module_pin_mux(mmc0_pin_mux_sk_evm);
} else {
puts("Unknown board, cannot configure pinmux.");
hang();
--- a/include/configs/am335x_evm.h
+++ b/include/configs/am335x_evm.h
@@ -301,7 +303,7 @@
#define CONFIG_NET_MULTI
#define CONFIG_PHY_GIGE
#define CONFIG_PHYLIB
-#define CONFIG_PHY_ADDR 0
+#define CONFIG_PHY_ADDR 1
#define CONFIG_PHY_SMSC
#define CONFIG_NAND
[3] http://permalink.gmane.org/gmane.comp.boot-loaders.u-boot/16382
Thanks,
--
Nicolas Calderon